Mt25qu512abb8e12-0sit tr t-pbga-24 (6x8) memory MgO
Device Description
ple the transfer bandwidth for READ and PROGRAM operations.
Features
The MT25Q is a high-performance multiple input/output serial Flash memory device. It
features a high-speed SPI-compatible bus interface, execute-in-place (XIP) functionali
ty, advanced write protection mechanisms, and extended address access. Innovative,
high-performance, dual and quad input/output commands enable double or quadru
• SPI-compatible serial bus interface
• Single and double transfer rate (STR/DTR)
• Clock frequency
– 166 MHz (MAX) for all protocols in STR
– 90 MHz (MAX) for all protocols in DTR
• Dual/quad I/O commands for increased through
put up to 90 MB/s
• Supported protocols in both STR and DTR
– Extended I/O protocol
– Dual I/O protocol
– Quad I/O protocol
• Execute-in-place (XIP)
• PROGRAM/ERASE SUSPEND operations
• Volatile and nonvolatile configuration settings
• Software reset
• Additional reset pin for selected part numbers
• 3-byte and 4-byte address modes – enable memory
access beyond 128Mb
• Dedicated 64-byte OTP area outside main memory
– Readable and user-lockable
– Permanent lock with PROGRAM OTP command
• Erase capability
– Bulk erase
– Sector erase 64KB uniform granularity
– Subsector erase 4KB, 32KB granularity
• Security and write protection
– Volatile and nonvolatile locking and software
write protection for each 64KB sector
– Nonvolatile configuration locking
– Password protection
– Hardware write protection: nonvolatile bits
(BP[3:0] and TB) define protected area size
– Program/erase protection during power-up
– CRC detects accidental changes to raw data
• Electronic signature
– JEDEC-standard 3-byte signature (BB20h)
– Extended device ID: two additional bytes identify
device factory options
• JESD47H-compliant
– Minimum 100,000 ERASE cycles per sector
– Data retention: 20 years (TYP)
Options
Marking
• Voltage
– 1.7–2.0V
U
• Density
– 512Mb
512
• Device stacking
– Monolithic
A
• Device generation
B
• Die revision
B
• Pin configuration
– HOLD#
1
– RESET# and HOLD#
8
• Sector Size
– 64KB
E
• Packages – JEDEC-standard, RoHS
compliant
– 24-ball T-PBGA 05/6mm × 8mm
(TBGA24)
12
– Wafer level chip-scale package, 27
balls, 9 active balls (XFWLBGA 0.5P)
56
– 16-pin SOP2, 300 mil
(SO16W, SO16-Wide, SOIC-16)
SF
– W-PDFN-8 8mm × 6mm
(MLP8 8mm × 6mm)
W9
• Security features
– Standard security
0
• Special options
– Standard
S
– Automotive
A
• Operating temperature range
– From –40°C to +85°C
IT
– From –40°C to +105°C
AT
– From –40°C to +125°C
UT