Mt25qu256aba1ew9-0sit wdfn-8 MCU agent has the lowest spot price
describe
Mt25q is a high-performance multiple input / output serial flash memory device. It has high-speed SPI compatible bus interface, local execution (XIP) function, advanced write protection mechanism and extended address access. Innovative, high-performance, dual and Quad I / O commands double or quadruple the transmission bandwidth of read and program operations.
features
• SPI compatible serial bus interface
• single and dual transmission rates (STR / DTR)
• clock frequency
-The maximum frequency of all protocols in str is 166 MHz
– the maximum frequency of all protocols in DTR is 90 MHz
• dual / quad I / O commands for increased throughput up to 90 MB / S
• protocols supported in STR and DTR
– extended I / O protocol
– dual I / O protocol
– four way I / O protocol
• local execution (XIP)
• program / erase pending operation
• volatile and nonvolatile configuration settings
• software reset
• additional reset pin for selected part number
• 3-byte and 4-byte address mode – enable memory
More than 128MB of access
• dedicated 64 byte OTP area outside main memory
– readable and user lockable
– use the program OTP command for permanent locking
• erase function
– batch erase
– sector erasure 64KB unified granularity
– sub sector erasure 4KB, 32KB granularity
• security and write protection
– volatile and nonvolatile locking and software
Write protection per 64KB sector
– nonvolatile configuration
– password protection
– hardware write protection: nonvolatile bits
(BP [3:0] and TB) define the size of the protected area
– program / erase protection during power up
– CRC detects unexpected changes in raw data
• electronic signature
– JEDEC standard 3-byte signature (ba19h)
– extended device ID: the other two bytes identify
Equipment factory options
• comply with jesd47h standard
– at least 100000 erase cycles per sector
– data retention period: 20 years (typical)
Option tag
• voltage
–1.7-2.0V U
• density
–256Mb 256
• equipment stacking
– monolithic a
• equipment generation B
• mold version a
• pin configuration
– reset and hold #8
• sector size
–64KB E
• packaging – JEDEC standard, ROHS standard
– 24 ball t-pbga 05 / 6mm x 8mm (5 PCs.)
5 (array)
twelve
– 24 ball t-pbga 05 / 6mm x 8mm (4 off)
6 (array)
fourteen
-Wafer level chip level package, 15 balls, 9 movable balls (xfwlbga 0.5p) 55
– 16 pin sop2300 mils (so16w, so16 wide, soic-16)
San Francisco
–W-PDFN-8 6mm x 5mm（MLP8 6mmx 5mm）
W7
– w-pdfn-8 8mm x 6mm (mlp8 8mm x 6mm)
W9
• standard security 0
• special options
– standard s
– car a
• operating temperature range
– from - 40 ° C to + 85 ° C
-Temperature from - 40 ° C to + 105 ° C
Mt25q is a high-performance multiple input / output serial flash memory device. It has high-speed SPI compatible bus interface, local execution (XIP) function, advanced write protection mechanism and extended address access. Innovative, high-performance, dual and Quad I / O commands double or quadruple the transmission bandwidth of read and program operations.
features
• SPI compatible serial bus interface
• single and dual transmission rates (STR / DTR)
• clock frequency
-The maximum frequency of all protocols in str is 166 MHz
– the maximum frequency of all protocols in DTR is 90 MHz
• dual / quad I / O commands for increased throughput up to 90 MB / S
• protocols supported in STR and DTR
– extended I / O protocol
– dual I / O protocol
– four way I / O protocol
• local execution (XIP)
• program / erase pending operation
• volatile and nonvolatile configuration settings
• software reset
• additional reset pin for selected part number
• 3-byte and 4-byte address mode – enable memory
More than 128MB of access
• dedicated 64 byte OTP area outside main memory
– readable and user lockable
– use the program OTP command for permanent locking
• erase function
– batch erase
– sector erasure 64KB unified granularity
– sub sector erasure 4KB, 32KB granularity
• security and write protection
– volatile and nonvolatile locking and software
Write protection per 64KB sector
– nonvolatile configuration
– password protection
– hardware write protection: nonvolatile bits
(BP [3:0] and TB) define the size of the protected area
– program / erase protection during power up
– CRC detects unexpected changes in raw data
• electronic signature
– JEDEC standard 3-byte signature (ba19h)
– extended device ID: the other two bytes identify
Equipment factory options
• comply with jesd47h standard
– at least 100000 erase cycles per sector
– data retention period: 20 years (typical)
Option tag
• voltage
–1.7-2.0V U
• density
–256Mb 256
• equipment stacking
– monolithic a
• equipment generation B
• mold version a
• pin configuration
– reset and hold #8
• sector size
–64KB E
• packaging – JEDEC standard, ROHS standard
– 24 ball t-pbga 05 / 6mm x 8mm (5 PCs.)
5 (array)
twelve
– 24 ball t-pbga 05 / 6mm x 8mm (4 off)
6 (array)
fourteen
-Wafer level chip level package, 15 balls, 9 movable balls (xfwlbga 0.5p) 55
– 16 pin sop2300 mils (so16w, so16 wide, soic-16)
San Francisco
–W-PDFN-8 6mm x 5mm（MLP8 6mmx 5mm）
W7
– w-pdfn-8 8mm x 6mm (mlp8 8mm x 6mm)
W9
• standard security 0
• special options
– standard s
– car a
• operating temperature range
– from - 40 ° C to + 85 ° C
-Temperature from - 40 ° C to + 105 ° C