Ucc27524aqdgnrq1 gate drive IC Ti original stock
Characteristics of ucc27524a-q1
Meet the requirements of automotive applications
The following results comply with aec-q100 standard
Device temperature level 1
Device manikin (HBM) electrostatic discharge (ESD) classification class H2
Device charger device model (CDM) ESD classification class C4B
Industry standard pin assignment
Two independent gate drive channels
5A peak drive source current and sink current
Independent enabling function for each output
TTL and CMOS compatible logic thresholds independent of supply voltage
Hysteresis logic threshold for high immunity
It can handle negative voltage (-5v) on the input
The input and enable pin voltage levels are not limited by the VDD pin bias supply voltage
4.5V to 18V single power supply range
During VDD undervoltage lockout (UVLO), the output remains low (to ensure burr free pulse operation during power on and power off)
Fast propagation delay (typical value 13ns)
Rapid rise and fall time (typical values 7ns and 6ns)
The typical delay matching time between two channels is 1ns
For higher drive current, the two outputs can be connected in parallel
When the input is suspended, the output remains low
Small overall dimension integrated circuit (SOIC) -8, surface mount small overall dimension (MSOP) -8 package powerpad package option
-Operating temperature range from 40 ° C to 140 ° C
Scope of application
vehicle
Switch mode power supply
DC to DC converter
Motor control, solar
Gate drive for new broadband gap power supply devices such as Gan
Description of ucc27524a-q1
Ucc27524a-q1 device is a dual channel, high-speed, low side, gate driver device, which can effectively drive metal oxide semiconductor field effect transistor (MOSFET) and insulated gate bipolar transistor (IGBT) power switches. Ucc27524a-q1 is a change device of ucc2752x series. In order to increase stability and durability, ucc27524a-q1 adds the ability to directly handle -5v voltage on the input pin. Ucc27524a-q1 is a dual non inverting driver. Using a design that can greatly reduce the breakdown current from the inside, ucc27524a-q1 device can transmit the peak current pulse of up to 5A source current and 5A sink current to the capacitive load. This device also has rail to rail driving ability and a very small propagation delay with a typical value of 13ns. In addition, this driver has a matched internal propagation delay between the two channels, which makes this driver very suitable for applications such as synchronous rectifiers that have strict timing requirements for double grid drives. This also allows the two channels to be connected in parallel to effectively increase the current drive capability or use a single input signal to drive two switches in parallel. The input pin threshold is based on TTL and CMOS compatible low voltage logic, which is fixed and independent of VDD supply voltage. Wide hysteresis between high and low thresholds provides excellent immunity.
For safety reasons, when the input pin is suspended, the internal pull-up and pull-down resistors on the input pin of ucc27524a-q1 device ensure that the output is kept low. Ucc27524a-q1 device has special enable pins (ENA and ENB) to better control the operation of this driver application. For high-level active logic, these pins are internally pulled up to VDD and can remain disconnected for standard operation.
Meet the requirements of automotive applications
The following results comply with aec-q100 standard
Device temperature level 1
Device manikin (HBM) electrostatic discharge (ESD) classification class H2
Device charger device model (CDM) ESD classification class C4B
Industry standard pin assignment
Two independent gate drive channels
5A peak drive source current and sink current
Independent enabling function for each output
TTL and CMOS compatible logic thresholds independent of supply voltage
Hysteresis logic threshold for high immunity
It can handle negative voltage (-5v) on the input
The input and enable pin voltage levels are not limited by the VDD pin bias supply voltage
4.5V to 18V single power supply range
During VDD undervoltage lockout (UVLO), the output remains low (to ensure burr free pulse operation during power on and power off)
Fast propagation delay (typical value 13ns)
Rapid rise and fall time (typical values 7ns and 6ns)
The typical delay matching time between two channels is 1ns
For higher drive current, the two outputs can be connected in parallel
When the input is suspended, the output remains low
Small overall dimension integrated circuit (SOIC) -8, surface mount small overall dimension (MSOP) -8 package powerpad package option
-Operating temperature range from 40 ° C to 140 ° C
Scope of application
vehicle
Switch mode power supply
DC to DC converter
Motor control, solar
Gate drive for new broadband gap power supply devices such as Gan
Description of ucc27524a-q1
Ucc27524a-q1 device is a dual channel, high-speed, low side, gate driver device, which can effectively drive metal oxide semiconductor field effect transistor (MOSFET) and insulated gate bipolar transistor (IGBT) power switches. Ucc27524a-q1 is a change device of ucc2752x series. In order to increase stability and durability, ucc27524a-q1 adds the ability to directly handle -5v voltage on the input pin. Ucc27524a-q1 is a dual non inverting driver. Using a design that can greatly reduce the breakdown current from the inside, ucc27524a-q1 device can transmit the peak current pulse of up to 5A source current and 5A sink current to the capacitive load. This device also has rail to rail driving ability and a very small propagation delay with a typical value of 13ns. In addition, this driver has a matched internal propagation delay between the two channels, which makes this driver very suitable for applications such as synchronous rectifiers that have strict timing requirements for double grid drives. This also allows the two channels to be connected in parallel to effectively increase the current drive capability or use a single input signal to drive two switches in parallel. The input pin threshold is based on TTL and CMOS compatible low voltage logic, which is fixed and independent of VDD supply voltage. Wide hysteresis between high and low thresholds provides excellent immunity.
For safety reasons, when the input pin is suspended, the internal pull-up and pull-down resistors on the input pin of ucc27524a-q1 device ensure that the output is kept low. Ucc27524a-q1 device has special enable pins (ENA and ENB) to better control the operation of this driver application. For high-level active logic, these pins are internally pulled up to VDD and can remain disconnected for standard operation.
Ucc27524a-q1 devices are packaged in soic-8 (d) and (MSOP) -8 (DGN) with exposed pads.